The problem
EVs replace the alternator with an isolated DC–DC converter that keeps the 12 V battery charged and supplies lights, ECUs and pumps from the high-voltage pack. It must provide galvanic isolation, work over a wide input range as the pack charges and discharges, and run efficiently at high output current. The phase-shifted full bridge is a common topology for this job.
Objectives
- Choose transformer turns ratio and switching frequency for the input range.
- Build a phase-shifted full bridge with a centre-tapped rectifier and LC filter.
- Show how leakage inductance gives zero-voltage switching and causes duty loss.
- Close a voltage loop and test load and input steps.
- Estimate losses and efficiency.
What you need
Tools and toolboxes
- Simulink — Phase-shift modulator, controller, logging and scripted tests.
- Simscape Electrical — MOSFETs with output capacitance, transformer and inductor models, rectifier diodes or synchronous MOSFETs.
- Control System Toolbox — Optional: bode and margin on the averaged model for voltage loop design.
Software
- MATLAB R2023b or later
- Simulink
- Simscape Electrical
Extra parts and data
None beyond the software above.
Key concepts
- Phase-shift control
- Both bridge legs switch at 50 per cent duty; the phase shift between them sets the time the transformer sees full input voltage, and hence the output voltage.
- Zero-voltage switching
- Energy stored in the leakage inductance discharges the MOSFET output capacitance during dead time, so the switch turns on at near zero voltage and switching loss falls.
- Duty-cycle loss
- While leakage inductance current reverses at the start of each half-cycle, the secondary is shorted by the rectifier, so effective duty is lower than the commanded phase shift.
- Turns ratio choice
- The ratio must deliver full output voltage at minimum input voltage with maximum effective duty, allowing for duty loss and rectifier drops.
Step-by-step guide
- 1
Set the example specification
Choose labelled example values: input 250–420 V (a 400 V class pack), output 13.8 V, 1.5 kW (about 110 A), 100 kHz switching, output ripple below 1 per cent and isolation required. State load-step and input-step requirements and a target efficiency at rated load for later comparison. High-voltage safety and isolation testing are outside the scope of this simulation project; isolation is represented only by the transformer model.
Checkpoint: A specification table with input range, output, power, frequency and dynamic limits.
- 2
Choose turns ratio and filter
Compute the primary-to-secondary turns ratio so that at 250 V input and a maximum effective duty of about 0.8, the output reaches 13.8 V plus rectifier and copper drops. Size the output inductor for 20–30 per cent ripple at maximum input, and the output capacitor for the ripple limit. Choose a leakage (or added series) inductance that provides ZVS above a chosen load.
Checkpoint: Script prints turns ratio, output L and C, and the load above which ZVS is expected.
- 3
Build the power stage
Build the full bridge from four Simscape Electrical MOSFETs with output capacitance modelled (or added parallel capacitors), a series inductor for leakage, a transformer block with centre-tapped secondary, two rectifier diodes or synchronous MOSFETs, and the LC filter with a resistive load. Use a fixed-step local solver at about 20 ns so that dead-time transitions are resolved. Halve the step once to confirm convergence.
Checkpoint: Open-loop at a fixed phase shift, the output reaches a voltage consistent with turns ratio and effective duty.
- 4
Implement phase-shift modulation
Generate gate signals: each leg switches at 50 per cent duty with dead time (for example 150 ns), and the lagging leg is delayed by the commanded phase shift. Plot the transformer primary voltage and current over a cycle and identify the power-transfer interval and the freewheeling interval. Check that dead time is long enough for the drain voltage to swing fully at the chosen ZVS load, and record the value you settle on for later loss estimates.
Checkpoint: Primary voltage shows a three-level waveform whose width changes with phase shift as expected.
- 5
Study ZVS and duty loss
Zoom into switching transitions of the leading and lagging legs and check whether the drain-source voltage falls to zero before the gate turns on. Sweep load from 10 to 100 per cent with sim() and record where the lagging leg loses ZVS. Measure effective secondary duty against commanded phase shift and compare with the duty-loss formula. Keep the sweep data so the plots can be regenerated quickly.
Checkpoint: A plot of ZVS boundary against load and a duty-loss comparison within a few per cent of theory.
- 6
Close the voltage loop
Design a PI or Type II voltage controller using an averaged model of the converter as a buck derived converter with effective input Vin/n. Choose a crossover around a few kilohertz with at least 45 degrees phase margin. Add an inner output-current limit for protection. Check margins at minimum and maximum input voltage, since the effective plant gain scales with input voltage divided by the turns ratio, and add input-voltage feed-forward if gain varies too much.
Checkpoint: Output regulates at 13.8 V across the full input range with steady error below 0.5 per cent.
- 7
Test transients
Apply load steps from 20 to 100 per cent and back, and an input step from 300 to 400 V. Log output voltage, inductor current and phase shift. Measure deviation and recovery time and compare with the requirement. Script all tests so they rerun after any change. Check also that the current limit engages correctly under an output short circuit and that the converter recovers once the fault is removed.
Checkpoint: All dynamic tests meet the deviation and recovery limits, or the shortfall is explained.
- 8
Estimate losses and report
Estimate primary MOSFET conduction losses, switching losses where ZVS is lost, transformer and inductor copper losses, and rectifier losses, comparing diodes with synchronous rectification. Plot efficiency against load. Write up the design, the ZVS study, control, tests and efficiency, with simplifications such as linear magnetics and no core loss unless modelled. Explain where losses peak and which design change, such as turns ratio or leakage inductance, would help most.
Checkpoint: Efficiency curves for diode and synchronous rectification and a reproducible report.
Testing & validation
- Output voltage consistent with turns ratio and effective duty.
- ZVS boundary against load measured.
- Duty loss compared with theory.
- Regulation across the full input range.
- Load and input step responses within limits.
Expected results
An isolated high-voltage to 12 V converter model with a justified turns ratio, a measured ZVS range, closed-loop regulation across the input range and efficiency estimates for two rectifier options.
Take it further
- Add a clamp circuit for secondary rectifier ringing and measure the effect.
- Compare with an LLC resonant converter for the same specification.
- Add bidirectional operation for 12 V-to-high-voltage pre-charge.
- Model the 12 V battery and auxiliary loads over a drive.
Viva and review questions
Why does the lagging leg lose ZVS first at light load?
Its transition is driven only by the energy in the leakage inductance, which falls with load current, while the leading leg also has the reflected output inductor current.
What causes duty-cycle loss?
At the start of each half-cycle the leakage inductance current must reverse, and during that time both rectifiers conduct and the secondary voltage is zero, so effective duty is lower than commanded.
Why use synchronous rectification at 12 V output?
Output current is very high, so diode forward-voltage losses are large compared with output power; low-resistance MOSFETs cut these losses considerably.
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