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M.TechMotor drivesAdvanced About 8 weeksMATLAB & Simulink

SVPWM vs SPWM: Voltage Utilisation and Harmonics in an EV Drive

Compare sine-triangle PWM, third-harmonic-injection PWM, space-vector PWM and a discontinuous PWM on the same three-phase EV inverter model. Measure DC-link voltage utilisation, current THD, torque ripple and switching losses across modulation index and switching frequency.

Tools: Simulink · Simscape Electrical

SVPWM vs SPWM: Voltage Utilisation and Harmonics in an EV Drive: Students handling a two-wheeler BLDC hub motor at DIYguru
Representative photo from DIYguru's EV lab, not of this specific project.

The problem

The modulation method decides how much of the battery voltage reaches the motor, how much ripple the currents carry and how much the switches heat up. Textbooks state that SVPWM gives about 15 per cent more voltage than SPWM, but the trade-offs against harmonics and losses at different operating points are less often measured. A careful comparison helps choose a method for a given traction drive.

Objectives

  • Implement four modulation schemes on the same inverter and load.
  • Measure line voltage fundamental against modulation index, including overmodulation.
  • Measure current THD and torque ripple at several operating points.
  • Estimate switching and conduction losses for each scheme.
  • Recommend a method for a stated EV drive operating profile.

What you need

Tools and toolboxes

  • Simulink — Modulator implementations, carrier generation, scripted sweeps.
  • Simscape Electrical — Switching three-phase inverter, RL or PMSM load, semiconductor loss data.
  • Simscape — Physical-network solver settings (local fixed-step solver) and electrical reference elements, installed with Simscape Electrical.

Software

  • MATLAB R2023b or later
  • Simulink
  • Simscape Electrical
  • MATLAB fft for harmonic analysis

Extra parts and data

None beyond the software above.

Key concepts

Modulation index
For sine-triangle PWM, ma is the ratio of reference amplitude to carrier amplitude; in the linear range the fundamental line voltage peak is (√3/2)·ma·Vdc.
Zero-sequence injection
Adding a common signal to all three phase references does not change line voltages but can flatten the references so a larger fundamental fits under the carrier; SVPWM is equivalent to min–max injection.
Discontinuous PWM
A scheme that clamps each phase to a DC rail for part of every cycle, so that phase does not switch then, reducing switching losses by up to about a third.
Total harmonic distortion
The RMS of all harmonic components divided by the fundamental; for PWM inverters, current THD depends on switching frequency, load inductance and modulation method.

Step-by-step guide

  1. 1

    Define the test set-up

    Choose a labelled example: 400 V DC link, a three-phase inverter at 10 kHz, and a balanced RL load representing a motor (for example R = 0.1 ohm, L = 0.5 mH per phase with a sinusoidal back-EMF source). Fix fundamental frequency at, say, 200 Hz. Define metrics: fundamental line voltage, current THD up to the 100th harmonic, and estimated losses. Use the same load and switches for every scheme.

    Checkpoint: A test plan listing schemes, modulation indices, switching frequencies and metrics.

  2. 2

    Build the inverter and load

    Build a switching three-phase bridge with Simscape Electrical IGBT or MOSFET switching blocks with antiparallel diodes, a DC Voltage Source and the RL plus back-EMF load. Use a fixed-step local solver with a step of 0.1 µs or less so that the 10 kHz edges are resolved. Log phase voltages, line voltages and currents. Check that the dead time, if included, is the same for every scheme so that it does not bias the comparison.

    Checkpoint: A fixed 50 per cent duty on all phases gives zero line voltage and zero current.

  3. 3

    Implement SPWM and third-harmonic PWM

    Generate three sine references and compare them with a triangular carrier. For third-harmonic injection add one sixth of the fundamental amplitude at three times the frequency to all phases. Check both in the linear range by measuring the fundamental line voltage with fft over an integer number of fundamental cycles. Keep the carrier synchronised with the fundamental, or use a high carrier ratio, so that sub-harmonics do not distort the measurements.

    Checkpoint: SPWM line voltage fundamental equals 0.866·ma·Vdc peak within 1 per cent; third-harmonic PWM stays linear to about ma = 1.15.

  4. 4

    Implement SVPWM and DPWM

    Implement SVPWM either by sector and dwell-time calculation or by min–max zero-sequence injection, and check both give the same duty cycles. Implement a discontinuous scheme such as DPWM1 by clamping the phase with the largest magnitude to the nearest rail for 60 degrees around its peak. Plot the effective phase references for each method over one fundamental cycle. Run each scheme at the same modulation index and confirm that line-voltage fundamentals agree in the linear range, since this proves the implementations are equivalent where they should be.

    Checkpoint: Reference waveform plots match the expected shapes for each method, and SVPWM is linear up to Vdc/√3 phase peak.

  5. 5

    Sweep modulation index

    Script a sweep of modulation index from 0.1 into overmodulation for each method with sim(), measure the fundamental line voltage and plot it against the commanded value. Mark where each leaves the linear range. Compare the maximum linear voltage of SPWM with SVPWM and compute the gain. Save the sweep data so the plot can be regenerated without rerunning every simulation.

    Checkpoint: Plot shows SVPWM giving about 15 per cent more linear voltage than SPWM.

  6. 6

    Measure current THD and ripple

    At three modulation indices and two switching frequencies (for example 5 and 10 kHz), compute phase current THD using fft over an integer number of fundamental cycles, and current ripple peak-to-peak. For DPWM compare at equal switching losses as well as equal carrier frequency, since a fair comparison needs that. Keep the analysis window and harmonic range fixed for all runs, and use the same fft script for every scheme so differences cannot come from the measurement.

    Checkpoint: A table of THD for each method, index and frequency, with DPWM compared at equal loss.

  7. 7

    Estimate losses

    From logged switch currents compute conduction loss using on-state voltage or resistance and switching loss as switching energy scaled by current and DC-link voltage from an example datasheet. Count switching events per phase to confirm the reduction for DPWM. Plot loss against power factor too, because DPWM's benefit depends on where the clamp falls relative to current peak. State the datasheet test conditions used for scaling.

    Checkpoint: DPWM shows lower switching events and lower switching losses, with the size of the saving depending on power factor.

  8. 8

    Test with a motor and an operating profile

    Replace the RL load with a Simscape Electrical PMSM drive under FOC and run a few operating points from a light urban profile and a high-speed motorway point. Measure torque ripple and losses for each method. Combine with time spent at each point to estimate profile-weighted losses. Use the same current controller gains for all schemes, and check that each scheme delivers the commanded torque before comparing losses, since a scheme that falls short is not a fair comparison.

    Checkpoint: Profile-weighted loss and torque ripple for every method in one table.

  9. 9

    Conclude and report

    Present voltage utilisation curves, THD tables, loss estimates and the motor results, with a recommendation for the example drive. Many production inverters switch between SVPWM at low speed and DPWM at high modulation, so discuss when to change over. State model limits such as ideal dead time and no parasitics. Include a short table that lists each scheme's strengths and weaknesses so that a designer can choose quickly, and note which results would need hardware tests.

    Checkpoint: A report with a justified recommendation and all results scripted and reproducible.

Testing & validation

  • Linear-range voltage gain of each method checked against theory.
  • Overmodulation onset measured for each method.
  • Current THD measured over integer fundamental cycles.
  • Switching event counts and loss reduction for DPWM.
  • Profile-weighted loss comparison with a motor load.

Expected results

A quantified comparison of four modulation schemes on one EV inverter model covering voltage utilisation, harmonics, losses and torque ripple, with a recommendation tied to a stated drive profile.

Research angle for your M.Tech thesis

Research questions: across a realistic EV operating profile, which modulation method or hybrid switching strategy gives the best trade-off between inverter loss, current distortion and DC-link utilisation, and where should a hybrid scheme change over? Metrics: profile-weighted loss, THD, torque ripple and common-mode voltage. Baselines: SPWM and SVPWM at fixed switching frequency. Fair comparison needs equal-loss and equal-ripple conditions, not only equal carrier frequency. A study that proposes and validates a changeover rule against a drive cycle, with released models, can support a conference paper.

Take it further

  • Add dead time and its compensation, and measure the effect on low-current distortion.
  • Study common-mode voltage for each method and its effect on bearing currents.
  • Implement random PWM to spread acoustic noise and compare spectra.
  • Extend overmodulation into six-step operation and measure torque ripple.

Viva and review questions

Why does SVPWM give more voltage than SPWM?

It adds a zero-sequence component that flattens the phase references, so a larger fundamental fits within the carrier; line voltages are unaffected by the zero-sequence part.

Why compute THD over an integer number of fundamental cycles?

Otherwise spectral leakage spreads the fundamental into neighbouring bins and inflates the harmonic content.

Why does DPWM's loss saving depend on power factor?

Switching loss is highest when current is largest, so the saving is greatest when the clamped interval coincides with the current peak, which depends on the phase angle between voltage and current.

Learn it at DIYguru

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