Fixed-Point Field-Oriented Control on a Cortex-M3 without FPU: Accuracy vs Cycle Budget

The problem

Low-cost EV controllers often use microcontrollers without floating-point hardware. FOC needs Clarke and Park transforms, PI regulators and space-vector modulation every PWM period, so number format and algorithm choices decide whether the loop fits in time and how much quantisation degrades torque quality.

Objectives

• Implement a sensored FOC current loop with SVPWM synchronised to ADC sampling
• Write the control chain in Q15, Q31 and soft-float variants with identical structure
• Measure execution time with the DWT cycle counter against the PWM period budget
• Quantify current ripple, tracking error and torque-related metrics for each variant

What you need

Key concepts

Clarke and Park transforms

They convert three phase currents into two stationary components and then into rotor-aligned d and q currents, which are DC in steady state and easy to regulate with PI controllers.

Q formats

Q15 stores a value in a 16-bit integer with 15 fractional bits; Q31 uses 32 bits; products need wider intermediate results and shifts, and saturation must be handled.

Cycle budget

At 72 MHz and 20 kHz PWM there are 3600 CPU cycles per period, which must cover ADC handling, transforms, two PI loops, SVPWM and any communication.

Injected ADC triggered by TIM1

The STM32F103 can trigger injected conversions from TIM1, and ADC1 and ADC2 can sample two phase currents simultaneously at the PWM centre.

Step-by-step guide

1. 1

   Research questions and reference model

   Write precise research questions: how much current ripple and tracking error each number format adds compared with a double-precision reference, and what fraction of the 3600-cycle budget each implementation uses. Build a double-precision FOC model of your motor in Simulink or Python that can run from recorded inputs as well as simulated ones. Agree the metrics with your supervisor, and fix the operating points you will test so all variants are compared under the same conditions.

   Checkpoint: A documented reference model and a list of metrics agreed with your supervisor.

2. 2

   Hardware integration and safety

   Connect the TIM1 complementary outputs, the break input, the current-sense amplifier outputs and the encoder to the kit headers, checking pin conflicts on the kit schematic and isolating conflicting kit blocks with the DIP switches. Use the bench supply with a low current limit throughout development. Verify gate signals, dead time and break behaviour with the bridge unpowered first, and only then power the bridge without a motor before connecting one.

   Checkpoint: Gate waveforms with dead time are correct and break input disables outputs.

3. 3

   Synchronised current sampling

   Configure TIM1 in centre-aligned mode at 20 kHz, and trigger ADC1 and ADC2 injected conversions simultaneously at the PWM centre using a TIM1 compare channel, so two phase currents are sampled at the same instant. Measure and store the amplifier offsets with outputs disabled at start-up. Convert readings to Q15 amps using the shunt resistance and amplifier gain, and check them against the oscilloscope or an independent current measurement at low current.

   Checkpoint: Phase currents read by the MCU match the oscilloscope within a stated error at low current.

4. 4

   Angle and speed

   Read the encoder with a timer in encoder mode. At start-up, align the rotor by applying a d-axis current for a moment so the encoder zero matches the electrical zero. Compute electrical angle from the count and pole pairs, and get sine and cosine from a Q15 lookup table with interpolation. Estimate speed from angle differences over a longer window. Check the angle increases smoothly and wraps exactly once per electrical revolution.

   Checkpoint: Electrical angle increases smoothly and repeats exactly once per electrical revolution.

5. 5

   Q15 control chain

   Implement the full chain inside the ADC injected-conversion interrupt: Clarke, Park, d-axis and q-axis PI regulators with anti-windup and output saturation, inverse Park and space-vector modulation, all in Q15. Use 32-bit intermediates for every product and saturate explicitly before storing a result. Start with id held at zero and iq set from the potentiometer, at low current, and confirm the motor runs smoothly under current control.

   Checkpoint: The motor runs under current control with id held near zero and iq following the pot set-point.

6. 6

   Q31 and soft-float variants

   Write the same chain in Q31 and in single-precision float compiled with software floating point, keeping the structure, gains and lookup tables equivalent so differences come only from the number format. Select the variant at compile time, or with a runtime switch if all three fit in flash. Run each variant at the same operating point and confirm all three run the motor before starting measurements, noting any variant that misses the cycle budget.

   Checkpoint: All three variants run the motor under the same test conditions.

7. 7

   Measure execution time

   Enable the DWT cycle counter and record the cycles taken by each block, such as the transforms, the PI regulators and the modulation, and by the whole interrupt, for every variant. Run long enough to capture the worst case, including cache-free flash wait states and any interrupt nesting. Express each figure as a fraction of the 3600 cycles available per period, and present mean and worst case in a table.

   Checkpoint: A table of mean and worst-case cycles per block for each variant.

8. 8

   Measure control quality

   Capture id, iq, set-points and angle at the full 20 kHz rate in short RAM buffers, then dump them over UART between captures. For each variant compute iq tracking error, id ripple, phase-current THD and speed ripple at several speeds and loads, with repeats. Feed the same set-points to the double-precision reference model and compare, so the effect of number format is separated from the effects of the control design and the hardware.

   Checkpoint: Metrics for every variant, operating point and repeat, with the double reference alongside.

9. 9

   Explore optimisations

   Study how far you can cut the cost without losing accuracy. Vary the lookup-table size and interpolation method, the saturation strategy, and mixed formats such as Q15 transforms with Q31 integrators. For each configuration measure cycles and the control-quality metrics. Plot accuracy against cycles to find the Pareto front, and identify the cheapest configuration that stays within a chosen tolerance of the reference.

   Checkpoint: A Pareto plot of accuracy against cycles across all configurations.

10. 10

    Analyse and generalise

    Explain the measured differences with quantisation-noise analysis: predict the noise each word length and scaling adds at each stage of the chain and how it propagates to current ripple. Compare the predictions with the measured ripple for each configuration, and check whether the analysis ranks the configurations in the same order as the measurements. If it does, turn it into a design rule for choosing formats under a cycle budget.

    Checkpoint: Analytical predictions compared with measured ripple for each configuration.

11. 11

    Write up

    Write a paper-style chapter covering the method, hardware, measurements, the quantisation analysis and recommendations for FOC on FPU-less microcontrollers. Include threats to validity, such as a single motor and inverter, and the uncertainty of the current measurements. Release the firmware variants, analysis scripts and logged data, so every figure in the chapter can be reproduced by another lab with similar hardware.

    Checkpoint: A paper-style chapter with reproducible figures.

Testing & validation

• MCU phase-current readings checked against an independent measurement
• Cycle counts per block and worst-case interrupt time for each variant
• Current-loop metrics compared with a double-precision reference
• Pareto analysis of accuracy against cycle cost

Expected results

A working sensored FOC drive on a Cortex-M3 and a quantified map of how number format and implementation choices trade control quality against CPU time, with an analytical model that explains the measurements.

Take it further

• Add a sensorless observer and repeat the comparison
• Compare with the same code on a Cortex-M4F with hardware floating point
• Add field weakening and study precision needs at high speed

Viva and review questions